? semiconductor components industries, llc, 2006 december, 2006 ? rev. 3 1 publication order number: mc100lvel05/d mc100lvel05 3.3vecl 2-input differential and/nand description the mc100lvel05 is a 2-input differential and/nand gate. the device is functionally equivalent to the mc100el05 device and operates from a 3.3 v supply voltage. with propagation delays and output transition times equivalent to the el05, the lvel05 is ideally suited for those applications which require the ultimate in ac performance at low voltage power supplies. because a negative 2-input nand is equivalent to a 2-input or function, the differential inputs and outputs of the device allows the lvel05 to also be used as a 2-input differential or/nor gate. features ? 340 ps propagation delay ? high bandwidth output transitions ? esd protection: >4 kv human body model, >200 v machine model ? the 100 series contains temperature compensation ? pecl mode operating range: v cc = 3.0 v to 3.8 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 3.0 v to ? 3.8 v ? internal input pulldown resistors ? q output will default low with all inputs open or at v ee ? meets or exceeds jedec spec eia/jesd78 ic latchup test ? moisture sensitivity level 1 for additional information, see application note and8003/d ? flammability rating: ul 94 v ? 0 @ 0.125 in, oxygen index: 28 to 34 ? transistor count = 69 devices ? pb ? free packages are available *for additional marking information, refer to application note and8002/d. marking diagrams* kv05 alyw soic ? 8 d suffix case 751 1 8 tssop ? 8 dt suffix case 948r 1 8 1 8 see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information http://onsemi.com kvl05 alyw 1 8 dfn8 mn suffix case 506aa 3y m 14 (note: microdot may be in either location) a = assembly location l = wafer lot y = year w = work week m = date code = pb ? free package
mc100lvel05 http://onsemi.com 2 1 2 3 45 6 7 8 d 0 d 0 d 1 d 1 v ee q q v cc figure 1. logic diagram and pinout assignment d0, d0 ; d1, d1 ecl data inputs q, q ecl data outputs v cc positive supply v ee negative supply table 1. pin description pin function ep exposed pad must be con- nected to a sufficient thermal conduit. electrically connect to the most negative supply or leave floating open. table 2. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 8 to 0 v v ee necl mode power supply v cc = 0 v ? 8 to 0 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 to 0 ? 6 to 0 v v i out output current continuous surge 50 100 ma ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm 8 soic 8 soic 190 130 c/w c/w jc thermal resistance (junction ? to ? case) standard board 8 soic 41 to 44 5% c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm 8 tssop 8 tssop 185 140 c/w c/w jc thermal resistance (junction ? to ? case) standard board 8 tssop 41 to 44 5% c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm dfn8 dfn8 129 84 c/w c/w t sol wave solder pb pb ? free <2 to 3 sec @ 248 c <2 to 3 sec @ 260 c 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
mc100lvel05 http://onsemi.com 3 table 3. lvpecl dc characteristics v cc = 3.3 v; v ee = 0.0 v (note 1) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 18 25 18 25 19 26 ma v oh output high voltage (note 2) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mv v ol output low voltage (note 2) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mv v ih input high voltage (single ? ended) 2135 2420 2135 2420 2135 2420 mv v il input low voltage (single ? ended) 1490 1825 1490 1825 1490 1825 mv v ihcmr input high voltage common mode range (differential) (note 6) vpp < 500 mv vpp 500 mv 1.2 1.5 2.9 2.9 1.1 1.4 2.9 2.9 1.1 1.4 2.9 2.9 v v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary 0.3 v. 2. outputs are terminated through a 50 ohm resistor to v cc ? 2.0 v. 3. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the differential input signal. normal operation is obtained if the high level falls within the specified range and the peak-to-peak voltage lies between v pp min and 1v. table 4. lvnecl dc characteristics v cc = 0.0 v; v ee = ? 3.3 v (note 4) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 18 25 18 25 19 26 ma v oh output high voltage (note 5) ? 1085 ? 1005 ? 880 ? 1025 ? 955 ? 880 ? 1025 ? 955 ? 880 mv v ol output low voltage (note 5) ? 1830 ? 1695 ? 1555 ? 1810 ? 1705 ? 1620 ? 1810 ? 1705 ? 1620 mv v ih input high voltage (single ? ended) ? 1165 ? 880 ? 1165 ? 880 ? 1165 ? 880 mv v il input low voltage (single ? ended) ? 1810 ? 1475 ? 1810 ? 1475 ? 1810 ? 1475 mv v ihcmr input high voltage common mode range (differential) (note 6) vpp < 500 mv vpp 500 mv ? 2.1 ? 1.8 ? 0.4 ? 0.4 ? 2.2 ? 1.9 ? 0.4 ? 0.4 ? 2.2 ? 1.9 ? 0.4 ? 0.4 v v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. input and output parameters vary 1:1 with v cc . v ee can vary 0.3 v. 5. outputs are terminated through a 50 ohm resistor to v cc ? 2.0 v. 6. v ihcmr min varies 1:1 with v ee , max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the differential input signal. normal operation is obtained if the high level falls within the specified range and the peak-to-peak voltage lies between v pp min and 1v.
mc100lvel05 http://onsemi.com 4 table 5. ac characteristics v cc = 3.3 v; v ee = 0.0 v or v cc = 0.0 v; v ee = ? 3.3 v (note 7) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle frequency tbd tbd tbd ghz t plh t phl propagation delay to output 240 260 440 240 340 440 250 450 ps t jitter cycle ? to ? cycle jitter tbd tbd tbd ps v pp input swing (note 8) 150 1000 150 1000 150 1000 mv t r t f output rise/fall times q (20% ? 80%) 100 320 100 210 320 100 320 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. v ee can vary 0.3 v. 8. v pp (min) is the minimum input swing for which ac parameters are guaranteed. the device has a dc gain of 40. figure 2. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 3.0 v
mc100lvel05 http://onsemi.com 5 ordering information device package shipping ? mc100lvel05d soic ? 8 98 units / rail mc100lvel05dg soic ? 8 (pb ? free) 98 units / rail mc100lvel05dr2 soic ? 8 2500 / tape & reel mc100lvel05dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc100lvel05dt tssop ? 8 100 units / rail mc100lvel05dtg tssop ? 8 (pb ? free) 100 units / rail mc100lvel05dtr2 tssop ? 8 2500 / tape & reel mc100lvel05dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel MC100LVEL05MNR4 dfn8 1000 / tape & reel MC100LVEL05MNR4g dfn8 (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc100lvel05 http://onsemi.com 6 package dimensions soic ? 8 nb case 751 ? 07 issue ah seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc100lvel05 http://onsemi.com 7 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop ? 8 dt suffix plastic tssop package case 948r ? 02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane ?w?.
mc100lvel05 http://onsemi.com 8 package dimensions dfn8 case 506aa ? 01 issue d notes: 1. dimensioning and tolerancing per asme y14.5m, 1994 . 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. ???? ???? ???? ???? a d e b c 0.10 pin one 2 x reference 2 x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 8 x a1 seating plane e/2 e 8 x k note 3 b 8 x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k 0.20 ??? l 0.25 0.35 1 4 8 5 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc100lvel05/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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